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題名：RISC/B處理器的模型化與效益評估
書刊名：嶺東學報
作者：陳陽越
出版日期：1992
卷期：4
頁次：頁142-196
主題關鍵詞：效益；評估；模型化
原始連結：連回原系統網址new window
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  • 被引用次數被引用次數:期刊(0) 博士論文(0) 專書(0) 專書論文(0)
  • 排除自我引用排除自我引用:0
  • 共同引用共同引用:0
  • 點閱點閱:27
期刊論文
1.Barbacci, M. R.(1981)。Instruction Set Processor Specification (ISPS): The Notation and Its Application。IEEE Trans. Comput.，30(1)，8-21。  new window
2.Clark, D. W.、Emer, J. S.(1985)。Performance of the VAX-11/780 Translation Buffer: Simulation and Measurement。ACM Trans. Comput. Systems，3(1)，31-62。  new window
3.Holliday, M. A.、Vernon, M. K.(1987)。A Generalized Timed Petri Net Model for Performance Analysis。IEEE Trans. Comput.，13(12)，1297-1310。  new window
4.Peng, D.、Shin, K. G.(1987)。Modeling of Concurrent Task Execution in a Distributed System for Real-Time Control。IEEE Trans. Comput.，36(4)，500-516。  new window
5.Magenheimer, D. J.(1986)。The HP Precision Simulator。Heweltt-Packard Journal，1986(Aug.)，40-43。  new window
6.Gross, T. R.(1988)。Measurement and Evaluation of the MIPS Architecture and Processor。ACM Trans. Comput. Systems，16(3)，229-257。  new window
7.Amstrong, J. R.(1988)。Chip-level Modeling With HDLs。IEEE Design & Test of Computers，5(1)，8-18。  new window
8.Colwell, R. P.(1985)。Computer, Complexity and Controversy。IEEE Computer，18(9)，8-19。  new window
9.Mitchell, C. L.、Flynn, M. J.(1988)。A Workbench for Computer Architects。IEEE Design & Test of Computers，5(1)，19-29。  new window
10.Mangelsdorf, S. T.(1987)。A VLSI Processor for HP Precision Architecture。Hewlett-Packard Journal，38(9)，4-11。  new window
11.Chiou, C. W.、Yang, T. C.(1989)。Fully Testable PLA Design with At Most One Extra Input。IEEE Trans. Comput.。  new window
12.Hennessy, J.、Gross, T.(1983)。Postpass Optimizations of Pipeline Constraints。ACM TOPLAS，1983(Jul.)，22-31。  new window
13.Park, N.、Parker, A. C.(1988)。Theory of Clocking for Maximum Execution Overlap of High-Speed Digit Systems。IEEE Trans. Comput.，37(6)，678-690。  new window
14.Hwu, W. W.、Patt, Y. N.(1987)。Checkpoint Repair for High-Performance Out-of-Order Execution Machine。IEEE Trans. Comput.，36(12)，1496-1514。  new window
15.Smith, J. E.、Pleszkun, A. R.(1988)。Implementing Precise Interups in Pipeined Processors。IEEE Trans. Comput.，37，562-573。  new window
16.Dougarra, J.、Martin, J. L.、Worlton, J.(1987)。Computer Benchmarking: Paths and Pitfalls。IEEE Spectrum，24(7)，38-43。  new window
17.Agerwala, T.(1979)。Putting Petri Nets to Work。IEEE Computer，12(12)。  new window
18.Smith, A. J.(1987)。Line (Block) Size Choice for CPU Cache Memories。IEEE Trans. Comput.，36(9)，1063-1075。  new window
會議論文
1.Emer, J. S.、Clark, D. W.(1984)。A Characterization of Processor Performance in The VAX-11/780。11th Ann. Symp. on Computer Architecture。New York：ACM/IEEE。301-311。  new window
2.Clark, D. W.、Bannon, P. J.、Keller, J. B.(1988)。Measuring VAX 8800 Performance with a Historgm Hardware Monitors。IEEE Int. Sumpercomputing，176-185。  new window
3.Radin, G.(1979)。The 801 Minicomputer。The 6th Symp. on Computer Architecture，39-46。  new window
4.Taylor, G.(1985)。SPUR Instruction Set Architecture。UC Berkeley。220-231。  new window
5.Chow, P.、Horowitz, M.(1987)。Architectural Tradeoffs in the Design of MIPS-X。14th Annual Symp. Comput. Architecture，300-308。  new window
6.Tasi, T. T.、Bau, S. J.、Chen, C.、Fu, H. C.、Chung, C. P.(1987)。VLSI Design and Implementation of LISCP--A Fast RISC-style Prolog Machine。National Computer Symp.，30-39。  new window
7.Chen, J. C.、Lin, K. K.、Hsu, H. Y.、Yang, T. C.(1987)。The Design and Implementation of an Event-Driven Logical Simulator。R.O.C.。538-544。  new window
8.Hwang, Y.、Chen, K. C.、Yang, T. C.(1988)。Decisions on RISC/B Execution Strategy。ISMM Int. Conf. Mini and Micro-computers。  new window
9.Hsu, H. Y.、Hwang, Y.、Chen, K. C.、Chen, C. T.、Yang, T. C.(1987)。Control Path and Data Path Design for RISC/B。Nationsl Computer Symp.，57-65。  new window
10.Chiou, C. W.、Yang, T. C.(1987)。Design of Self-checking PLAs Using Alternating Logic。Int. Test Conf.。Washington, DC。  new window
11.Chiou, C. W.、Yang, T. C.(1987)。A General Reconfigurable Redundancy System。6th Annual IEEE Phoenix Conf. Computers & Communication。Phoenix。  new window
12.Tai, S. W.、Lee, Y. S.、Yang, T. C.(1988)。Optimizing Delayed Loads and Delayed Branches for RISC/B。Int. Computer Symp.，182-187。  new window
13.Tai, S. W.、Lin, K. K.、Yang, T. C.(1987)。Code Reorganization and Register Allocation Under the RISC pipeline Environment。National Computer Symp.，47-56。  new window
14.Zuberek, W. M.(1980)。Timed Petri Nets and Preliminary Performance。7th Annual Symp. Comput. Architecture，89-96。  new window
15.Chen, Y. Y.、Chen, K. C.、Yang, T. C.(1988)。Performance Analysis on RISC/B Processor。Int. Computer Symp.，215-220。  new window
16.Dasgupta, S.(1984)。A model of clocked micro-architectures for firmware engineering and design automation applications。MICRO-17。ACM。298-308。  new window
17.Prezbylski, S.、Horowitz, M.、Hennessy, J.(1988)。Performance Tradeoffs in Cache Design。15th Ann. Symp. on Computer Architecture，290-298。  new window
18.Hanen, C.(1988)。Optimizing Horizontal Microprograms for Vectorial Loops with Timed Petri Nets466-476。  new window
19.Zuberek, W. M.(1985)。Performance Evaluation Using Extended Timed Petri Nets。IEEE Int. Workshop on Timed Petri Nets，272-278。  new window
學位論文
1.Katevenis, M. G. H.(1983)。Reduced Instruction Set Computer for VLSI(博士論文)。Univ. of California at Berkeley。  new window
2.Prezybylski, S.(1984)。The Implementation of MIPS(博士論文)。Stanford Univ.。  new window
3.Chen, S. C.(1987)。The Design of RISC/B Instruction Pipeline(碩士論文)。Feng Chia Univ.。  new window
4.Wang, L.(1987)。Cache Memory Design for RISC/B Processor(碩士論文)。Feng Chia Univ.。  new window
5.Hwang, Y.(1987)。Multiple Winsow Register File for Multiple Tasks in RISC/B(碩士論文)。Feng Chia Univ.。  new window
6.Chang, Y. S.(1987)。The Design of RISC/B Instruction Set(碩士論文)。Feng Chia Univ.。  new window
7.Wang, H. J.(1989)。Multi-Coprocessor Parallel Architecture for RISC/B(碩士論文)。Feng Chia Univ.。  new window
8.Chang, C. C.(1990)。RISC/B Virtual Memory and Cache Design(碩士論文)。Feng Chia Univ.。  new window
9.Chen, C. T.(1990)。The Implementation of RISC/B Processor(碩士論文)。Feng Chia Univ.。  new window
10.Lee, Y. S.(1989)。Optimizing C Compiler on the RISC/B Processor(碩士論文)。Feng Chia Univ.。  new window
圖書
1.Myers, G. J.(1982)。Advances in Computer Architecture。  new window
2.Waters, F.。IBM RT Personal Computer Technology。  new window
3.Trivedi, K. S.(1982)。Probability and Statistics with Reliability, Queuing, and Computer Science Applications。Englewood Cliffs, NJ：Prentice-Hall。  new window
4.Peterson, James L.(1981)。Petri net theory and the modeling of systems。Prentice-Hall。  new window
 
 
 
 
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